1. Field of the Invention
The present invention relates to a semiconductor device performing a refresh operation for a memory cell array including a plurality of memory cells, and particularly relates to a semiconductor device performing an auto-refresh operation in a situation where there is an open page in the memory cell array, and a refresh control method thereof.
2. Description of Related Art
In a semiconductor memory device such as a DRAM, a control for improving access efficiency has been introduced, in which a predetermined word line in a memory cell array is activated, data is sensed and amplified through a bit line (so-called “open page”) and this state is maintained. Meanwhile, when using the DRAM, for example, it is required to perform a refresh operation for retaining data of memory cells with a constant period. Conventionally, various control methods have been proposed for performing the refresh operation in the semiconductor memory device employing a control of the above open page (for example, refer to Patent References 1 to 3).
For example, Patent Reference 1 discloses a control method for a semiconductor memory device in which memory blocks driven into active/inactive states independently of one another and each of the memory blocks has a plurality of pages. According to the control method of the Patent Reference 1, a page address designating a page in a selected state is stored in a page memory, and after allowing a designated memory block to be in an inactive state in response to a refresh request signal, the memory block is refreshed. Then, after the refresh operation, a corresponding page in the memory block is controlled to be driven into a selected state, and thus a decrease in page hit rate due to the refresh operation is suppressed.
For example, Patent Reference 2 discloses a control method in which when a refresh operation for the DRAM occurs, a row address immediately preceding the refresh operation is stored and the row address is selected to be given to the DRAM again after completion of the refresh operation in order to select the row address, so that a high-speed page mode access that has been interrupted by the refresh operation is resumed.    [Patent Reference 1] Japanese Patent Application Laid-open No. H9-288614 (U.S. Pat. No. 5,774,409)    [Patent Reference 2] Japanese Patent Application Laid-open No. H10-3783    [Patent Reference 3] Japanese Patent Application Laid-open No. 2006-236105 (U.S. Pub. No. 2006/0195665 A1)
However, the control method disclosed in the Patent Reference 1 is applied to a memory operation in which all blocks (corresponding to banks of the DRAM) are always maintained in a page open state, and a problem arises in that it cannot be applied to a general DRAM. Further, each bank of a current DRAM is configured with a plurality of blocks, and one page in one of the blocks is capable of being opened. Therefore, when all banks of the DRAM that are maintained in an open state are used, the refresh operation for blocks having no open page is performed so that the open page is refreshed after being closed and subsequently the closed page needs to be opened again. Thus, this requires a complicated control using a plurality of commands, thereby causing a problem of an increase in consumption current.
Additionally, the control in the current DRAM is generally performed so that a plurality of blocks or a plurality of banks are simultaneously refreshed, and however a control method in this case is not disclosed in the Patent Reference 1. Further, a redundancy relief control using redundant memory cells (redundancy word lines) is implemented in the current DRAM, and however a control method in this case is not disclosed in the Patent Reference 1. Furthermore, in the control method disclosed in the Patent Reference 1, it is assumed that a memory controller issues a plurality of commands, and however a problem arises in that a new controller for the DRAM needs to be designed in order to maintain compatibility with the current DRAM that performs an auto-refresh operation by issuing one command. In addition, the control method disclosed in the Patent Reference 2 has the same problems, and a control method capable of solving a series of these problems has not been proposed yet.